Principal Digitial Engineer, Chip-Lead

Description

Millions of people experience Synaptics every day. Our technology impacts how people see, hear, touch, and engage with a wide range of IoT applications -- at home, at work, in the car or on the go.

We solve complex challenges alongside the most influential companies in the industry, using the most advanced algorithms in areas such as machine learning, biometrics, and video processing, combined with world class software and silicon development.

Overview  

Synaptics is looking for a WLAN SOC Chip-lead to join our dynamic and growing WDP team. You will be responsible to drive the WLAN SOC architecture/design/implementation in the Wi-Fi 6/7 domain from concept to volume production for the IOT market. You will provide technical leadership and expertise in the SOC and Wi-Fi domain. Responsibilities will include overall chip schedule and coordinating with multiple teams on specifications, deliverables, handoff, verification, and timing closure. This role will work closely with RF/Analog teams for productizing WLAN/BT combo chips for home IOT and automotive markets. You will have a technical Leadership role in architecting area and power efficient low latency designs with scalabilities and flexibilities. You will drive innovations in the low power design, performance enhancements etc. This position reports to the Director, Digital Engineering.  

Responsibilities & Competencies  

Job Duties  

• Define WLAN SOC architecture from the standards and/or requirement documents
• Define the WLAN SOC PPI (power, performance, and area) parameters based on feature set
• Work with leads to deliver the WLAN SOC RTL, Netlist, power collateral, constraints
• Work with Systems/SW team in performance analysis and propose IP enhancements or any new IP requirement in the SOC
• Technical guidance for Corrective & Preventive Action planning and tracking
• Provide technical leadership of all aspects of VLSI development including SoC system aspects, SoC architecture, front end design, SoC Integration, Static checks, low power design, DFT, implementation, chip bring-up, debug, and transforming from first sample through release to volume production
• Responsible for overall chip schedule and coordinating with multiple teams on specifications, deliverables, handoff, verification, and timing closure 

Competencies  

• Strong fundamentals in CPU architecture, host interfaces like (PCIe, SDIO etc.), bus interconnects specially AXI/ACE/AHB/APB, low power design
• Power management with multiple power domains
• Strong understanding of the SOC development flow
• Knowledge in Lint, CDC, timing constraints, synthesis, STA, power analysis
• Ability to communicate complex, interactive design concepts clearly
• Proactive, self-starter, able to work independently in a fast-paced environment to complete projects on time with minimal guidance
• Well organized with strong attention to detail; proactively ensures work is accurate
• Positive attitude and work ethic; unafraid to ask questions and explore new ideas
• Resourceful and able to solve highly complex problems through adaptation of existing technology and development of new technology with a deep understanding of product architecture
• Should possess strong communication and leadership skills to ensure effective communication with Program Management or Engineering Management and group members
• Ability to work within a diverse team and mentor developing team members

Qualifications (Requirements)  

• Bachelor’s or master’s degree in Computer Engineering, Communication, Electrical/Electronic Engineering or related field, or equivalent
• 15+ years of experience in the design and delivery of Ips, Subsystems, and SOCs
• Experience in defining and using advanced front-end design flows based on industry standard EDA tools from system simulation through RTL implementation, verification, synthesis, and interfacing with a backend team
• Proven track record as SOC lead/architect of bringing logic designs into high volume production
• No travel required

Belief in Diversity

Synaptics is an Equal Opportunity Employer committed to workforce diversity. Qualified applicants will receive consideration without regard to race, sex, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, or genetic information.